The present invention relates to a method and apparatus for generating an optical bit slot window comprising N bit slots, all the N bit slots representing the same logical state, and uses thereof.
In the field of all optical processing, optical signal streams are used for data processing applications. These optical streams consist of an optical pulse train that is divided into a series of bit slots. Each bit slot, which has a predetermined length within the pulse train, represents a single bit of data, with the presence or absence of an optical pulse within a bit slot representing complementary logical states. Thus, for example, the presence of a pulse may represent a binary xe2x80x9c1xe2x80x9d, whilst the absence of an optical pulse may represent a binary xe2x80x9c0xe2x80x9d, or vice versa.
It has long been a goal to produce devices capable of carrying out all optical processing. In order to achieve such devices, it is necessary to produce, using only optical manipulations, optical signal streams with certain predefined characteristics. One such signal stream that is required for many applications is a window which comprises an optical stream with a predetermined number of bit slots all having the same logical state so as to represent a predetermined number of binary xe2x80x9c1xe2x80x9ds, or xe2x80x9c0xe2x80x9ds, in sequence.
According to a first aspect of the present invention, we provide a method of generating an optical bit sloth window comprising N bit slots, all the N bit slots representing the same logical state, using an all-optical switching device, the switching device having an input coupled to an optical pulse source which generates optical pulses in successive bit slots, each optical pulse representing a logical state, an output which generates an output stream defining the bit slot window, and a switching input coupled to a source of optical switching signals, wherein the application of switching signals to the switching input selectively switches a connection between the input and the output so as to change the logical state of the output, the method comprising applying a first switching signal to the switching input and, after a time interval corresponding to N bit slots, applying a second switching signal to the switching input.
According to a second aspect of the present invention, we provide apparatus for generating an optical bit slot window comprising N bit slots, all the N bit slots representing the same logical state, the apparatus comprising an optical pulse source which generates optical pulses in successive bit slots, each optical pulse representing a logical state; a source of switching signals which generates first and second switching signals separated by a time interval corresponding to N bit slots; and, a switching device, the switching device comprising a switching input coupled to the source of switching signals, an output which generates an output stream defining the bit slot window, and an input, coupled to the optical pulse source, wherein the application of switching signals to the switching input selectively switches a connection between the input and the output so as to change the logical state of the output.
We have designed a method and apparatus for generating an optical bit slot window comprising N bit slots, all the N bit slots representing the same logical state, thus providing a sequence of bit slots representing a predetermined number of binary xe2x80x9c1xe2x80x9ds, or xe2x80x9c0xe2x80x9ds, in sequencers
The apparatus comprises an optical switching device to which is input a continuous stream of optical pulses. By applying switching signals to the switching input of the switching device, a connection between the input and the output of the switching device can be opened or closed, allowing the transfer of optical pulses from the input to the switching device output to be controlled.
These optical pulses are used to generate an output stream and, as the presence or absence of an optical pulse represents complementary logical states, the logical state of the output stream can be controlled by controlling the transfer of the optical pulses to the output of the switching device.
As the application of a switching signal causes the connection to switch from open to closed, or vice versa, by applying two switching signals separated by a predetermined time interval corresponding to N bit slots, the output stream will represent one logical state for N bit slots and the complementary logical state outside the N bit slots.
Typically the source for generating optical switching signals comprises a source for generating a single optical switching signal; a delay line; and, an optical combiner, the optical combiner comprising first and second combiner inputs coupled to the single optical switching signal source and a combiner output, wherein the first combiner input is connected to the single optical switching signal source via the delay line such that the single optical switching signal is input to the first and second combiner inputs separated by a time interval corresponding to N bit slots such that first and second optical switching signals are output from the combiner output separated by N bit slots. This allows the predetermined number of bit slots to be altered by altering the time interval introduced by the delay line.
Preferably each switching signal comprises a single optical pulse in a bit slot, although a bit slot containing no optical pulse could be used, situated within a streamed bit slots containing optical pulses.
Typically the switching device comprises an all-optical non-linear gate, the non-linear gate comprising a gate input coupled to the switching device input; a gate output which generates a gate output stream; a gate switching input coupled to the switching device switching input, wherein the application of a switching signal to the gate switching input selectively switches a connection between the gate input and the gate output so as to change the logical state of the gate output stream for a time interval corresponding to a single bit slot; and, a feedback loop with a single bit slot delay for feeding back N bit slots of the gate output stream to the gate switching input to maintain the logical state of the gate output stream. Whilst any form of switching device may be used, an all-optical non-linear gate is preferable as it is compact and easy to use whilst still providing all optical operation with fast switching properties.
Typically the switching device further comprises an optical combiner, the optical combiner comprising a first combiner input coupled to the switching device switching input; a second combiner input coupled to the gate output via the feedback loop; and, a combiner output connected to the gate switching input, wherein if a bit slot having the same logical state as the switching signal, and a switching signal are received at the first and second combiner inputs at substantially the same time, then no switching signal is output from the combiner output. This allows the gate output stream to be fed back as a switching signal without there being problems of interferometric mixing of the switching signal and the output stream.
It will be realised that provision of no switching signal upon the reception of a switching signal and a bit slot having the same logical state may be achieved by simply ensuring there is no output from the combiner. However, preferably this is achieved by ensuring that any output from the combiner is not detectable as a switching signal, i.e. it is of a different format.
Typically, each of the N fed back bit slots in the gate output stream preferably comprise a single optical pulse in a bit slot. Although again a bit slot containing no optical pulse could be used.
Typically, the gate output is coupled to the switching device output such that each of the N optical bit slots contains an optical pulse. Alternatively however, the optical gate may further comprise a second gate output which generates a second gate output stream which is the logical complement of the gate output stream. In this case, the second gate output may be coupled to the switching device output such that each of the N optical bit slots contains no optical pulse.
Preferably the first and second switching signals are generated by generating a first switching signal; copying the first switching signal to generate a second switching signal; transferring the first switching signal to the switching input of the switching device; and, after a time interval corresponding to N bit slots, transferring the second switching signal to the switching input of the switching device. This allows the number of bit slots representing the same logical state to be quickly and easily altered by controlling the length of the time interval.
Typically each switching signal comprises a single optical pulse in a bit slot.
Typically the switching device includes an all-optical non-linear gate, the gate having a gate input coupled to the switching device input, a gate output which generates a gate output stream, and a gate switching input coupled to the switching device input, wherein the application of a switching signal to the switching input selectively switches a connection between the gate input and the gate output so as to change the logical state of the gate output stream for a time interval corresponding to a single bit slot. In such a case, the method preferably involves applying the first switching signal to the gate switching input to change the logical state of the gate output stream for a time interval corresponding to a single bit slot; and, feeding back N bit slots of the gate output stream with a single bit slot delay to the gate switching input to maintain the logical state of the gate output stream. This allows the non-linear gate to be controlled to produce an output stream of N bit slots having the desired logical state.
Preferably, the method further comprises combining the gate output stream and the switching signals prior to input to the gate switching input, such that if a bit slot having the same logical state as the switching signals, and a switching signal are combined, then no switching signal is applied to the gate switching input. This prevents the output stream being maintained in the logical state for longer than N bit slots, however, alternative methods for preventing the gate maintaining the logical state could be used.
Typically the N fed back bit slots in the gate output stream have the same logical state as the switching signals. Alternatively however the N fed back bit slots in the gate output stream have the complementary logical state compared to the switching signals and the logical state of the N fed back bit slots must therefore be inverted before the output stream is fed back to the gate switching input.
Typically each of the N fed back bit slots in the gate output stream comprise a single optical pulse in a bit slot.
In this case the output stream may be obtained from the gate output, such that each of the N optical bit slots contains an optical pulse.
Alternatively however the gate may further comprise a second gate output, the second gate output generating a second gate output stream having a complementary logical state with respect to the first output stream the method further comprising obtaining the output stream from the second gate output such that each of the N optical bit slots contains no optical pulse.
According to a third aspect of the invention, we provide a method of comparing first and second optical binary words, each word being defined as a sequence of M optical bit slots optically representing respective logical states, utilizing an all optical word comparator, the comparator having a first word input, a second word input, an input which receives a stream of optical pulses, and an output, the method comprising receiving the first and second binary words at the first and second word inputs respectively; comparing the respective bit slots of the two binary words; and, selectively switching a connection between the input and the output such that the output indicates the relationship between the two binary words.
According to a fourth aspect of the present invention, we provide an all optical word comparator for comparing first and second optical binary words, each word being defined as a sequence of M optical bit slots optically representing respective logical states, the apparatus comprising a first comparator word input which receives the first binary word; a second comparator word input which receives the second binary word; a comparator input which receives a stream of optical pulses; a comparator output; and a controller coupled to the first and second comparator word inputs, the comparator input and the comparator output, wherein the controller compares respective bit slots of the two binary words and selectively switches a connection between the comparator input and the comparator output such that the output from the comparator output indicates the relationship between the two binary words.
We provide a word comparator and a method of operating the word comparator for comparing two binary words. The word comparator receives the two binary words and compares the respective bit slots of each word such that if any bit slot in one word is different to the respective bit slot in the other word, then the comparator outputs an indication to the effect that the words are not identical.
Typically the method of comparing the words comprises generating a combined optical signal stream by combining respective bit slots of the first and second binary words such that the corresponding bit slot of the combined optical signal stream has a first logical state if the respective bit slots are identical and a second complementary logical state if the respective bit slots are different, and using the logical state of the combined optical signal stream to selectively switch the connection between the comparator input and the comparator output. This simply generates a signal stream which indicates whether each bit slot of one binary word is identical to the corresponding bit slot of the other binary word.
Typically the word comparator further comprises an all optical non-linear gate the gate comprising a gate input, a gate output, which generates a gate output stream, and, a gate switching input, wherein the application of a switching signal to the gate switching input selectively switches the connection between the gate input and the gate output, in which case the method preferably comprises applying the combined optical signal stream to the gate switching input such that the gate selectively switches a connection between the gate input and the gate output so as to change the logical state of the gate output stream. The gate provides a simple way of using the signal stream obtained from the comparator to control the output from the comparator.
Typically applying a switching signal to the gate switching input causes the gate output stream to change from the second logical state to the first logical state for a time period corresponding to one bit slot. Although the switch may be configured to change the output logical state for any period of time.
Typically the switching signal is an optical bit slot having the second logical state, although the bit slots having the first logical state may be used in a suitable switch.
Preferably the word comparator further comprises an optical regenerative memory which stores one optical bit slot representing a logical state, the memory having a memory word input, a memory output, and a memory input, the method further comprising applying the one bit slot to be stored to the memory word input; applying the gate output stream to the memory input; and outputting a copy of the stored bit slot from the memory output.
Preferably the bit slot to be stored has the second logical state and wherein, if the gate output stream contains a bit slot having the first logical state, the memory is reset such that the stored bit slot is replaced by a bit slot having the first logical state. This is a simple method of ensuring that once a single bit slot is discovered that is different for each of the two words, the comparator output will continue to indicate the presence of a difference until the circuit is reset, thereby ensuring that any indication of a difference is not missed.
Typically a bit slot having the second logical state contains a single optical pulse, although any suitable pulse sequence could be used.
Typically the controller further comprises an optical pulse generator the method further comprising applying a single optical pulse to the memory word input to generate the bit slot to be stored.
Typically the comparator of the third aspect of the invention may be reset by generating a stream of optical pulses, wherein the stream of optical pulses defines an optical bit slot window including at least one bit slot containing no optical pulse; and, applying the stream of optical pulses to the word comparator, the presence of the window in the stream of optical pulses causing the word comparator to reset. However any manner of ensuring that the bit slot stored in the memory is replaced by a bit slot containing no optical pulse is suitable.
Preferably however, reset is achieved using a method of generating an optical bit slot window according to the first aspect of the present invention to generate a stream of optical pulses defining an optical bit slot window including at least one bit slot containing no optical pulse, the presence of the bit slot window in the stream of optical pulses causing the word comparator to reset.
Typically the controller according to the fourth aspect of the invention comprises an optical combiner having first and second combiner inputs coupled to the first and the second word inputs respectively, and a combiner output which generates a combined optical signal stream, wherein the combiner combines respective bit slots of the first and second binary words such that the corresponding bit slot of the combined optical signal stream has a first logical state if the respective bit slots are identical and a second complementary logical state if the respective bit slots are different, the logical state of the combined optical signal stream being used to selectively switch the connection between the comparator input and the comparator output.
The controller will generally further comprise an all optical non-linear gate the gate comprising a gate input coupled to the comparator input; a gate output, which generates a gate output stream, coupled to the comparator output; and a gate switching input coupled to the combiner output, wherein the application of a switching signal to the gate switching input selectively switches a connection between the gate input and the gate output so as to change the logical state of the gate output stream.
Typically, in such a switch, the application of a switching signal to the gate switching input causes the gate output stream to change from the second logical state to the first logical state for a time period corresponding to one bit slot.
The controller of such a word comparator will typically further comprise an optical regenerative memory, which stores one optical bit slot representing a logical state, the memory having a memory word input which receives the one bit slot to be stored, a memory output coupled to the comparator output which outputs a copy of the stored bit slot, and a memory input, coupled to the gate output which receives the gate output stream.
The bit slot to be stored in the memory preferably has the second logical state and wherein, if the gate output stream contains a bit slot having the first logical state, the memory is reset such that the stored bit slot is replaced by a bit slot having the first logical state. However any suitable variation may be used.
The word comparator will typically have an optical pulse generator coupled to the memory word input for generating the bit slot to be stored, the bit slot having a single optical pulse.
The word comparator according to the fourth aspect of the invention is preferably reset using a window generator for generating a stream of optical pulses, wherein the stream of optical pulses defines an optical bit slot window including at least one bit slot containing no optical pulse, the presence of the bit slot window in the stream of optical pulses causing the word comparator to reset.
This window generator is preferably the window generator according to the second aspect of the present invention.
According to a fifth aspect of the present invention, we provide a method of separating X sequential bit slots from a binary word having Y bit slots, each bit slot representing a respective logical state, using an all optical non-linear gate having a gate input coupled to an optical pulse source which generates optical pulses in successive bit slots, each optical pulse representing a logical state, a gate output and a gate switching input, wherein the application of the switching signals to the switching input selectively switches a connection between the gate input and the gate output, the method comprising applying the binary word to the gate input; and, applying switching signals to the gate switching input, the switching signals being arranged such that the X sequential bit slots are output from the gate output.
According to a sixth aspect of the present invention, we provide a separating device for separating X sequential bit slots from a binary word having Y bit slots, each bit slot representing a logical state, the apparatus comprising a source of switching signals and an all optical non-linear gate having a gate input which receives a copy of the binary word, a gate output which outputs the X sequential bit slots, and a gate switching input which receives the switching signals from the source of switching signals, wherein the application of the switching signals to the switching input selectively switches a connection between the gate input and the gate output, the switching-signals being arranged such that the X sequential bit slots are output from the gate output.
The separating device operates to separate a predetermined number of bit slots from an optical word by passing the word through a gate and ensuring that the gate redirects the predetermined number of bits to an output, whilst the remainder of the word is either discarded or output from an alternative gate output.
For a separating device of this nature the gate typically has a second gate output, such that applying switching signals to the switching input selectively switches a connection between the gate input and the second gate output.
With two gate outputs, the gate input is preferably connected to one of the first or second gate outputs such that bit slots received by the gate input are output from one of the first and second gate outputs. However an alternative arrangement in which the input is not connected to either output in some circumstances may be used.
Typically applying a single switching signal to the gate switching input selectively switches the connection such that the gate input is connected to the gate output for a time interval corresponding to a single bit slot, although the time interval may be adjusted as required.
Preferably the method further comprises generating an optical signal stream defining an X bit slot window, and applying the signal stream defining the window to the gate switching input such that each of the X bit slots act as a switching signal. This provides an easy method of ensuring the correct number of bit slots are separated from the binary word.
In such a case each bit slot of the X bit slot window contains a single optical pulse.
In order to easily generate the X bit slot window the method according to the first aspect of the invention is usually used. This requires that the number of bit slots N in the bit slot window is equal to the number of bit slots X to be separated from the binary word. Typically this can be done using apparatus according to the second aspect of the invention.
According to a seventh aspect of the invention, we provide a method of determining the parity of a binary word, the binary word being represented by a sequence of Q optical bit slots, each bit slot defining a respective one of first and second complementary logical states, using a switching device, the switching device comprising an input coupled to an optical pulse source which generates optical pulses in successive bit slots, each optical pulse representing a logical state, an output, and a switching input wherein the application of switching signals to the switching input selectively switches a connection between the input and the output so as to change the logical state of the output, the method comprising applying the binary word to the gate switching input such that bit slots having the second complementary state act as switching signals, the parity of the binary word being determined from the final logical state of the output.
According to an eighth aspect of the present invention, we provide parity determining apparatus for determining the parity of a binary word, the binary word being represented by a sequence of Q optical bit slots and each bit slot defining a respective one of first and second complementary logical states, the apparatus comprising an optical pulse source which generates a stream of optical pulses, each optical pulse representing a logical state; and a switching device, the switching device comprising a switching input, an output which generates an output stream defining the bit slot window, and an input, coupled to the optical pulse source, wherein the application of switching signals to the switching input selectively switches a connection between the input and the output so as to change the logical state of the output, and wherein the binary word is applied to the gate switching input such that bit slots having the second complementary state act as switching signals, the parity of the binary word being determined from the final logical state of the output.
Accordingly, we provide a method and apparatus capable of determining the parity of a binary word. The parity is derived from the number of bit slots in the word having one of the two logical states. It is determined by counting the number of bit slots having one of the logical states using a switching device which will change state when a switching signal is applied. The word is then applied to the switching input of the switching device, which is configured such that bit slots having the relevant logical state will act as switching pulses.
Typically the switching device comprises an all-optical non-linear gate, the non-linear gate comprising a gate input coupled to the switching device input; a gate output which generates a gate output stream; a gate switching input coupled to the switching device input, wherein the application of a switching signal to the gate switching input selectively switches a connection between the gate input and the gate output so as to change the logical state of the gate output stream for a time interval corresponding to a single bit slot. For such apparatus the method preferably further comprises feeding back, with a single bit slot delay, any bit slots of the gate output stream, to the gate switching input, such that bit slots with the second logical state act as further switching signals.
Typically the method further comprises combining the gate output stream and the switching signals prior to input to the gate switching input, such that if a bit slot having the same logical state as the switching signals, and a switching signal are combined, then no switching signal is applied to the gate switching input. This ensures that the gate only switches as required.
This combining is achieved using an optical combiner, the optical combiner comprising a first combiner input coupled to the switching device switching input; a second combiner input coupled to the gate output via the feedback loop; and, a combiner output connected to the gate switching input, wherein if a bit slot having the same logical state as the switching signal, and a switching signal are received at the first and second combiner inputs at substantially the same time, then no switching signal is output from the combiner output.
Typically the gate output is coupled to the switching device output.
Preferably each switching signal is an optical bit slot containing a single optical pulse, although a bit slot containing an alternative number of optical pulses may be used.
Typically the apparatus further comprises an all optical non-linear gate having a gate input, first and second gate outputs, a gate switching input coupled to the switching device output, the method comprising applying the output of the switching device to the gate switching input such that the gate input is selectively connected to either the first or the second gate outputs depending on the logical state of the switching device output; and, applying a copy of the binary word to the gate input such that the copy of the binary word is transferred to either the first or second gate outputs in accordance with the logical state of the switching device output. This provides an easy means for controlling the destination of a binary word depending on its parity.
According to a ninth aspect of the present invention we provide a method for controlling the transfer of an optical data packet in accordance with the parity of a packet header, the data packet comprising an R optical bit slot binary word, each of the R bit slots representing a logical state, the method comprising separating the header from the data packet using an optical separating device having an input which receives the data packet and an output which outputs the packet header; determining the parity of the packet header using optical parity determining apparatus having an input, coupled to the output of the separating device to receive the packet header therefrom, and an output which generates an indication of the parity of the packet header; and, using the indication to control the transfer of the data packet.
According to a tenth aspect of the present invention, we provide apparatus for controlling the transfer of an optical data packet in accordance with the parity of a packet header, the data packet comprising a R optical bit slot binary word, each of the R bit slots representing a logical state, the apparatus comprising an optical separating device which separates the header from the data packet, the separating device having an input which receives the data packet and an output which outputs the packet header; and, optical parity determining apparatus which determines the parity of packet header, parity determining apparatus having an input, coupled to the output of the separating device to receive the packet header therefrom, and an output for generating an indication of the parity of the packet header, the indication being used to control the transfer of the data packet.
Accordingly, we provide a method and apparatus for controlling the flow of an optical data packet through a circuit depending on the parity of the packet header. This is achieved by removing the header, determining the parity and then switching the data packet to one of two destinations depending on the parity.
Such a system will generally be used as a way of removing incorrectly addressed data packets from a data network by ensuring that address of only one parity are used. By checking the parity of each data packet in the network, any packets with an incorrect parity will therefore be identified allowing them to be removed from the network.
Typically the method of separating the header from the data packet is a method according to the fifth aspect of the present invention the header comprising X sequential bit slots of the data packet, and wherein the data packet has Y bit slots.
Typically the method of determining the parity of the header is a method according to the seventh aspect of the present invention wherein the Q bit slot binary word whose parity is to be determined is the header.
Typically the separating device is separating a device according to the sixth aspect of the invention wherein the header comprises X sequential bit slots of the data packet, the data packet having Y bit slots.
Typically the parity determining apparatus is parity determining apparatus according to the eighth aspect of the present invention, wherein the Q bit slot binary word whose parity is to be determined is the packet header.
However, it will be realised that any suitable method or apparatus for separating the header or determining the header parity could also be used.
According to an eleventh aspect of the present invention, we provide a method of controlling the destination to which an optical data packet is transferred in accordance with destination information contained within a packet header, the data packet comprising an S bit slot packet header and a T bit slot packet payload, the method comprising separating the header from the data packet, using an optical separating device having an input which receives the data packet and an output which outputs the packet header; comparing the packet header to a predetermined destination address, using an optical word comparator having a first comparator word input connected to the separating device output to receive the packet header therefrom, a second comparator word input which receives the destination address, and an output, which generates an indication of the relationship between the packet header and the address; and, using the indication to control the destination to which the data packet is transferred.
According to a twelfth aspect of the present invention, we provide apparatus for controlling the destination to which an optical data packet is transferred in accordance with destination information contained within a packet header, the data packet comprising an S bit slot packet header and a T bit slot packet payload, the apparatus comprising an optical separating device which separates the header from the data packet, the separating device having an input which receives the data packet and an output which outputs the packet header; an optical word comparator which compares the packet header to a predetermined destination address, the word comparator having a first comparator word input connected to the separating device output to receive the packet header therefrom, a second comparator word input which receives the destination address, and an output, wherein the comparator compares respective bit slots of the header and outputs an indication of the relationship between the header and the destination address; and a switch which receives a copy of the data packet, and which is coupled to the output of the comparator such that the switch controls the destination to which the data packet is transferred in accordance with the indication of the relationship between the header and the destination address.
Accordingly, we provide a method and apparatus for determining the destination to which an optical data packet is transferred by comparing the data packet address to a predetermined address to determine whether these are identical.
Preferably the method of comparing the packet header to the destination address is a method according to the third aspect of the present invention, wherein the first M bit slot binary word is the S bit slot packet header and the second M bit slot binary word is the destination address, although any suitable method could be used.
Typically the method of separating the header from the data packet is a method according to the fifth aspect of the invention, wherein the X sequential bit slots to be separated are the S bit slots of the packet header, the Y bit slot word being the data packet including S bit slot header and the T bit slot payload.
Typically the word comparator is a word comparator according to the fourth aspect of the present invention, wherein the first M bit slot binary word is the S bit slot packet header and the second M bit slot binary word is the destination address.
Furthermore, the separation device is typically a separation device according to the sixth aspect of the present invention, wherein the X sequential bit slots to be removed are the S bit slots of the packet header, the Y bit slot binary word being the data packet including the S bit slot header and the T bit slot payload.
According to the thirteenth aspect of the present invention, we provide a method of resetting an optical regenerative memory, the memory having a word input which receives a binary word to be stored, the binary word comprising L optical bit slots, each bit slot defining a respective one of first and second complementary logical states, an output, an input which receives an optical signal stream, and a regenerative loop, wherein the regenerative loop is coupled to the input such that the application of bit slots having the second logical state to the word input selectively switches a connection between the input and the regenerative loop to cause respective bit slots of the optical signal stream to be transferred to the regenerative loop such that a copy of the word is generated in the loop if the respective bit slots have a second logical state, wherein the loop is further coupled to the output such that the output generates a copy of the binary word and wherein the contents of the loop are regenerated by applying a copy of the output to the word input, the method comprising generating an optical signal stream defining an N bit slot window, each of the N bit slots containing no optical pulses, and applying the optical signal stream to the memory input such that N bit slots contained in the loop are reset to the first logical state.
According to a fourteenth aspect of the present invention, we provide a resettable optical regenerative memory comprising a source for generating an optical signal stream defining an N bit slot window, each of the N bit slots having a first logical state; and a memory, the memory having a word input which receives a binary word to be stored, the binary word comprising L optical bit slots each bit slot defining a respective one of first and second complementary logical states, an output, an input which receives the optical signal stream, and a regenerative loop which is coupled to the input such that the application of bit slots having the second logical state to the word input selectively switches a connection between the input and the regenerative loop to cause respective bit slots of the optical signal stream to be transferred to the regenerative loop such that a copy of the word is generated in the loop if the respective bit slots have a second logical state, wherein the loop is further coupled to the output such that the output generates a copy of the binary word and wherein the contents of the loop are regenerated by applying a copy of the output to the word input, and wherein the reception of the N bit slot window causes the bit slots contained in the loop to be reset to the first logical state.
This aspect of the invention utilises the fact that regenerative type memories need a constant supply of optical pulses to the memory input. By interrupting this pulse supply, the memory will reset.
This in fact applies to other devices which require a constant supply of optical pulses such as the word comparator of the fourth aspect of the invention.
The method of generating an optical signal stream defining an N bit slot window is preferably a method according to the first aspect of the present invention.
Typically the N bit slot window is generated by a window generator according to the first aspect of the present invention.